|Role||Principal Researcher / Invited Associate Professor|
|Institution||ISTAR-IUL Laboratory – Lisbon University Institute ISCTE-IUL|
|Key Words / Areas of Interest||Microarchitecture, high performance computing, compilers, machine learning, deep neural networks, neuromorphic computing.|
|Expertise Sought||– Microarchitects
– High-efficiency computing experts
Computer Architecture and Compiler technologist towards High Performance and High Efficiency Deep Learning. Research on highly efficient system organization for high efficiency deep learning applications, with focus on novel DNN organizations (e.g. Capsule Networks) and end-to-end application of deep networks towards Neuromorphic computing (where the DNN is the key computation engine). Computing system performance analysis and improvement. Investigating End-to-End application of Deep Neural networks as the raw computational engine, obviating pre-processing steps. Identify data curation methods and develop canonical data representation. Investigate compiler-driven data type and precision requirements. Investigate energy- and power-efficient system instantiations and the need for specialized transducers. Formerly with Intel Labs, AMD Research (as a Fellow) on U.S.Dept of Energy Exascale Project, Motorola, IBM TJWatson & others. 55 US patents issued with 56 pending. Ph.D in ECE at CMU. IEEE Senior Member. Associate Editor, IEEE Micro.